Z8L18920FSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z8L18920FSC' PDF : 107 Pages View PDF
Zilog
PRELIMINARY
ACSI TIME CONSTANT REGISTERS
New Z8S180 Registers
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
7 6 54 3 21 0
Register: ASCI0 Time Constant Low
Address: 1Ah
7 6 54 3 21 0
Register: ASCI1 Time Constant Low
Address: 1Ch
7 6 54 3 21 0
Register: ASCI0 Time Constant High
Address: 1Bh
7 6 54 3 21 0
Register: ASCI1 Time Constant High
Address: 1Dh
CLOCK MULTIPLIER REGISTER (Z180 MPU ADDRESS 1EH)
Bit 7. X2 Clock Multiplier Mode. When this bit is set to 1, this
allows the programmer to double the internal clock from
that of the external clock. This feature will only operate
effectively with frequencies of 10-16 MHz (20-33 MHz
internal).
When this bit is set to 0, the Z189 device will operate in
normal mode. Upon powerup, this feature is disabled.
Bit 0-6. Reserved. Maintains a logic 1 value when read.
New Z8S180 Register
765 43210
0 11 1 1 11 1
Reserved
X2 Clock Multiplier Mode
0 = Disable
1 = Enable
Figure 44. Clock Multiplier Register
(Z180 MPU Address 1EH)
48
DS971890301
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