3D7501Z Datasheet PDF - Data Delay Devices

FUNCTIONAL DESCRIPTION
The 3D7502 product family consists of monolithic CMOS Manchester Decoders. The unit accepts at the RX input a bi-phase-level, embedded-clock signal. In this encoding mode, a logic one is represented by a high-to-low transition within the bit cell, while a logic zero is represented by a low-to-high transition.

FEATURES
·  All-silicon, low-power CMOS technology
·  TTL/CMOS compatible inputs and outputs
·  Vapor phase, IR and wave solderable
·  Auto-insertable (DIP pkg.)
·  Low ground bounce noise
·  Maximum data rate:50 MBaud
·  Data rate range: ±15%