74V2G08 Datasheet PDF - STMicroelectronics

DESCRIPTION
The 74V2G08 is an advanced high-speed CMOS DUAL 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output.
Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)
■ POWER DOWN PROTECTION ON INPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY