AS7C1026C Datasheet PDF - Alliance Semiconductor

Functional description
The AS7C1026C is a 5V high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 65,536 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (tAA, tRC, tWC) of 12 ns with output enable access times (tOE) of 6 ns are ideal for highperformance applications.

FEATUREs
• Industrial (-40o to 85oC) temperature
• Organization: 65,536 words × 16 bits
• Center power and ground pins for low noise
• High speed
    - 12 ns address access time
    - 6 ns output enable access time
• Low power consumption via chip deselect
• Easy memory expansion with CE, OE inputs
• TTL-compatible, three-state I/O
• Upper and Lower byte pin
• JEDEC standard packaging
    - 44-pin 400 mil SOJ
    - 44-pin TSOP 2-400
• ESD protection ≥ 2000 volts