AS7C31025C Datasheet PDF - Alliance Semiconductor

Functional description
The AS7C31025C is 3V a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 131,072 x 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

FEATUREs
• Industrial and commercial temperatures
• Organization: 131,072 x 8 bits
• High speed
    - 10 ns address access time
    - 5 ns output enable access time
• Low power consumption via ship deselect
• Easy memory expansion with CE, OE inputs
• Center power and ground
• TTL/LVTTL-compatible, three-state I/O
• JEDEC-standard packages
    - 32-pin, 300 mil SOJ
    - 32-pin, 400 mil SOJ
    - 32-pin, TSOP 2
• ESD protection ≥ 2000 volts