AS7C33512PFS16A-100TQC Datasheet PDF - Alliance Semiconductor

Functional description
The AS7C33512PFS16A and AS7C33512PFS18A are high performance CMOS 8-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 524,288 words × 16 or 18 bits and incorporate a pipeline for highest frequency on any given technology.

FEATUREs
• Organization: 524,288 words × 16 or 18 bits
• Fast clock speeds to 166 MHz in LVTTL/LVCMOS
• Fast clock to data access: 3.5/3.8/4.0/5.0 ns
• Fast OE access time: 3.5/3.8/4.0/5.0 ns
• Fully synchronous register-to-register operation
• “Flow-through” mode
• Single-cycle deselect
    - Dual-cycle deselect also available (AS7C33512PFD16A/ AS7C33512PFD18A)
• Pentium®* compatible architecture and timing
• Asynchronous output enable control
• Economical 100-pin TQFP package
• Byte write enables
• Multiple chip enables for easy expansion
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate VDDQ
• 30 mW typical standby power in power down mode
• NTD™* pipeline architecture available (AS7C33512NTD16A/AS7C33512NTD18A)