C8051F972-A-GMR Datasheet PDF - Silicon Laboratories

System Overview
The C8051F97x device family are fully integrated, mixed-signal system-on-a-chip MCUs. Highlighted features are listed below. Refer to Table 4.1 for specific product feature selection and part ordering numbers.
■Core:
   ● Pipelined CIP-51 Core
   ● Fully compatible with standard 8051 instruction set
   ● 70% of instructions execute in 1-2 clock cycles
   ● 25 MHz maximum operating frequency
■Memory:
   ● 16-32 kB flash; in-system programmable in 512-byte sectors
   ● 4352-8448 bytes RAM (including 256 bytes standard 8051 RAM and 4-8 kB on-chip XRAM)
■Power:
   ● Ultra low power consumption in active and sleep modes.
   ● Power-on reset circuit and brownout detectors
■ Capacitive Sensing:
   ● Supports button and slider elements
   ● 40 us/channel conversion time
   ● 16-bit resolution
   ● Auto scan and wake-on-touch
   ● Auto-accumulate up to 64 samples
■I/O:
   ● Up to 43 total multifunction I/O pins:
   ● Flexible peripheral crossbar for peripheral routing
■Clock Sources:
   ● Precision internal oscillator: 24.5 MHz ±2%
   ● Low Power Oscillator: 20 MHz ±20%
   ● Low-frequency internal oscillator: 16.4 kHz
   ● External crystal, RC, C, and CMOS options
■Timers/Counters and PWM:
   ● 3-channel Programmable Counter Array (PCA) supporting PWM, capture/compare,
      frequency output modes, and watchdog timer function
   ● 4x 16-bit general-purpose timers
■Communications and Other Digital Peripherals:
   ● UART
   ● SPI™
   ● I2C / SMBus™
   ● High-Speed I2C Slave
   ● 16-bit CRC Unit, supporting automatic CRC of flash at 256-byte boundaries
■Analog:
   ● 10-bit Analog-to-Digital Converter (ADC) (300 ksps)
■Digital:
   ● 7-channel DMA
   ● 16 x 16 Multiply and Accumulate hardware
■Unique Identifier:
● 128-bit unique key for each device
■On-Chip Debugging