CDK-2000-LCO Datasheet PDF - Cirrus Logic

General Description
The CS2300-03 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-03 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for generation of a low-jitter clock relative to an external noisy synchronization clock with frequencies as low as 23 kHz. The CS2300-03 is a CS2300-OTP device that has been preconfigured at the factory. There are three hardware configuration pins available for mode and feature selection.

FEATUREs
♦ Clock Multiplier / Jitter Reduction
    – Generates a Low Jitter 6 - 75 MHz Clock from a Jittery 23 kHz to 30 MHz Clock Source
♦ Internal LCO Reference Clock
♦ 128 Hz Loop Filter Bandwidth
♦ Selectable Multiplication Factors
    – 1x, 4x, 128x, and 256x
♦ Selectable Aux Output Pin
♦ Minimal Board Space Required
    – No External Analog Loop-filter Components