CS1220 Datasheet PDF - Applied Micro Circuits Corporation

Overview
   The function of the S1220 clock and data recovery unit is to derive high speed timing signals for SONET/SDH-based equipment. The S1220 receives either an OC-12 or an OC-3 scrambled NRZ signal and recovers the clock from the data stream. The device outputs a differential bit clock and retimed data.

FEATUREs
• Complies with Bellcore and ITU-T 
   specifications for jitter tolerance, 
   jitter transfer, and jitter generation
• On-chip high-frequency PLLs for clock 
   generation and clock recovery
• Supports Data Rates of 155.52 Mbps (OC-3)
   and 622.08 Mbps (OC-12)
• LVDS or LVPECL differential serial interface
• Internal termination of the optic’s LVPECL
   driver renders a seamless power saving connection
• Typical 320 mW power in LVDS I/O mode
• Directly compatible with 2.5 V or 3.3 V LVDS,
   3.3 V LVPECL (DC and AC)
• 196 PBGA Package,15x15 mm2 with Green/
   RoHS compliant lead free option
• CMOS 0.13 micron technology
• 1.2 V and 3.3 V/2.5 V Power supply
• Receiver lock detect output for each channel
• Continued on next page...
• Signal detect input on each channel
• Selectable reference frequencies of 19.44,
   77.76 or 155.52 MHz
• Quad configuration, mixed Mode OC-3/OC-12
• Independent power down of unused channels
• Drop-in-replacement for S1212

APPLICATIONs
• SONET/SDH OC-3/OC-12
• SONET/SDH modules
• SONET/SDH test equipment
• ATM over SONET/SDH
• Section repeaters
• Add Drop Multiplexers (ADM)
• Broad-band cross-connects
• Fiber optic terminators
• Fiber optic test equipment