EDI9LC644V2012BC Datasheet PDF - White Electronic Designs Corporation

DESCRIPTION
The EDI9LC644VxxBC is a 3.3V, 128K x 32 Synchronous Pipeline SRAM and a 1Mx32 Synchronous DRAM array constructed with one 128K x 32 SBSRAM and two 1Mx16 SDRAM die mounted on a multilayer laminate substrate. The device is packaged in a 153 lead, 14mm by 22mm, BGA.

FEATURES
■ Clock speeds:
    • SSRAM: 200, 166,150, and 133 MHz
    • SDRAMs: 125 and 100 MHz
■ DSP Memory Solution
    • Texas Instruments TMS320C6201
    • Texas Instruments TMS320C6701
■ Packaging:
    • 153 pin BGA, JEDEC MO-163
■ 3.3V Operating supply voltage
■ Direct control interface to both the SSRAM and SDRAM ports on the “C6x”
■ Common address and databus
■ 65% space savings vs. monolithic solution
■ Reduced system inductance and capacitance