GTL2002(2009) Datasheet PDF - NXP Semiconductors.

General description
The Gunning Transceiver Logic - Transceiver Voltage Clamps (GTL-TVC) provide high-speed voltage translation with low ON-state resistance and minimal propagation delay. The GTL2002 provides 2 NMOS pass transistors (Sn and Dn) with a common gate (GREF) and a reference transistor (SREF and DREF). The device allows bidirectional voltage translations between 1.0 V and 5.0 V without use of a direction pin.

FEATUREs
■ 2-bit bidirectional low voltage translator
■ Allows voltage level translation between 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5 V buses, which allows direct interface with GTL, GTL+, LVTTL/TTL and 5 V CMOS levels
■ Provides bidirectional voltage translation with no direction pin
■ Low 6.5 Ω ON-state resistance (Ron) between input and output pins (Sn/Dn)
■ Supports hot insertion
■ No power supply required; will not latch up
■ 5 V tolerant inputs
■ Low standby current
■ Flow-through pinout for ease of printed-circuit board trace routing
■ ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
■ Packages offered: SO8, TSSOP8 (MSOP8), VSSOP8, XQFN8U

APPLICATIONs
■ Any application that requires bidirectional or unidirectional voltage level translation from any voltage between 1.0 V and 5.0 V to any voltage between 1.0 V and 5.0 V
■ The open-drain construction with no direction pin is ideal for bidirectional low voltage (e.g., 1.0 V, 1.2 V, 1.5 V, or 1.8 V) processor I2C-bus port translation to the normal 3.3 V or 5.0 V I2C-bus signal levels or GTL/GTL+ translation to LVTTL/TTL signal levels.