ICS853111-01 Datasheet PDF - Integrated Circuit Systems

GENERAL DESCRIPTION
The ICS853111-01 is a low skew, high perfor mance 1-to-9 Differential-to-3.3V LVPECL/ECL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The PCLK, nPCLK pair can accept LVPECL, CML and SSTL differential input levels. The ICS853111-01 is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the ICS853111-01 ideal for those clock distribution applications demanding well defined performance and repeatability.

FEATURES
• 9 differential 3.3V LVPECL / ECL outputs
• 1 differential LVPECL input pair
• PLCK, nPLCK pair can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
• Maximum output frequency: >2GHz (typical)
• Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nPCLK input
• Additive phase jitter, RMS: 0.03ps (typical)
• Output skew: 35ps (maximum)
• Part-to-part skew: 300ps (maximum)
• Propagation delay: 675ps (maximum)
• LVPECL mode operating voltage supply range:
   VCC = 3V to 3.8V, VEE = 0V
• ECL mode operating voltage supply range:
   VCC = 0V, VEE = -3V to -3.8V
• -40°C to 85°C ambient operating temperature
• Lead-Free package RoHS compliant