ICS9147F-14 Datasheet PDF - Integrated Circuit Systems

General Description
The ICS9147-14 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro. Two bidirectional I/O pins (FS1,FS2) are latched at power-on to the functionality table, with FS0 selectable in real-time to toggle between conditions.

FEATUREs
• Four copies of CPU clock
• Twelve SDRAM (3.3V TTL), usable as AGP clocks
• Seven copies of PCICLK clock (synchronous with CPU clock/2 or CPU/2.5 for 75 and 83.3 MHz CPU)
• CPU clocks to PCICLK clocks skew 1-4ns, center 2.6ns.
• One IOAPIC clock @14.31818 MHz
• Two copies of Ref. clock @14.31818 MHz
• Ref. 14.31818 MHz Xtal oscillator input
• Separate VDDL1 for four CPU and single IOAPIC output buffers to allow 2.5V output (or Std. Vdd)
• One each 48/ 24 MHz (3.3 V TTL)
• 3.3V outputs: SDRAM, PCI, REF, 48/24MHz.
• 2.5V or 3.3V outputs: CPU, IOAPIC.
• 20 ohm CPU clock output impedance
• 20 ohm PCI clock output impedance
• 1.5ns rise time (30 pF loading)
• –250 ps CPU, PCI clock skew
• 350ps (cycle by cycle) CPU jitter
• 2ms Power up clock stable time
• 45-55% Clock duty cycle
• 48 pin 300 mil SSOP package
• 3.0V - 3.7V supply range w/2.5V compatible outputs