ICSSSTU32864YHT Datasheet PDF - Integrated Circuit Systems

General Description
This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation.

Product Features:
• 25-bit 1:1 or 14-bit 1:2 configurable registered buffer
• Supports SSTL_18 JEDEC specification on data inputs and outputs
• Supports LVCMOS switching levels on CSR# and RESET# inputs
• Low voltage operation VDD = 1.7V to 1.9V
• Available in 96 BGA package

Recommended Application:
• DDR2 Memory Modules
• Provides complete DDR DIMM logic solution with ICS97U877