LH5481U-25 Datasheet PDF - Sharp Electronics

FUNCTIONAL DESCRIPTION
The LH5481 andLH5491 are high-performance, asynchronous First-In, First-Out (FIFO) memories organized 64 words deep by eight or nine bits wide. The eight-bit LH5481 has an Output Enable (OE) function, which can be used to force the eight data outputs (DO) to a high-im pedance state. The LH5491 has nine data outputs.
These FIFOs accept eight or nine-bit data at the Data Inputs (DI). A Shift In (SI) signal writes the DI data into the FIFO. A Shift Out (SO) signal shifts stored data to the Data Outputs (DO). The Output Ready (OR) signal indicates when valid data is present on the DO outputs.

FEATURES
• Fastest 64 × 8/9 Cascadable FIFO 35/25/15 MHz
• Expandable in Word Width and FIFO Depth
• Almost-Full/Almost-Empty and Half-Full Flags
• Fully Independent Asynchronous
   Inputs and Outputs
• LH5481 Output Enable forces Data
   Outputs to High-Impedance State
• Pin-Compatible Replacements for Cypress
   CY7C408A/09A or Logic Devices
   L8C408/09 FIFOs
• Industry Standard Pinout
• Packages:
   28-Pin, 300-mil DIP
   28-Pin PLCC