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LPC47N350 Datasheet PDF - SMSC -> Microchip

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Part Name
LPC47N350

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346 Pages

File Size
2.1 MB

MFG CO.
SMSC
SMSC -> Microchip SMSC

General Description
The LPC47N350 is a highly integrated LPC-based ACPI 2.0 and PC2001 compliant Keyboard, System, and Power Management Controller for Notebook PC Applications. See Figure 1.1.
The LPC47N350 incorporates a high-performance 8051-based keyboard and system controller with internal 64k byte Flash ROM; a hot-plug Docking LPC port; a Serial Peripheral Interface (SPI), four PS/2 ports; a real-time clock; a 16C550A-compatible 2 pin UART for Debug Port; two 8584-style I2C/SMBus controllers with two selectable ports per controller; a Serial IRQ peripheral agent interface; an ACPI Embedded Controller Interface; forty-one General Purpose I/O pins; four independently programmable pulse width modulators; dual fan control through the implementation of two fan tachometer input pins; and maskable hardware wake-up events.

Product Features
■ 3.3V Operation with 5V Tolerant Buffers
■ ACPI 2.0 PC2001 Compliant
■ LPC Interface with Clock Run Support
   — Decode I/O, Memory, and FWH cycles
   — Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
   — 15 Direct IRQs
   — ACPI SCI Interface
   — nSMI output and supporting PM registers
   — Shadowed write only registers
■ LPC Switching
   — Hot Plug LPC Docking Interface
   — Secondary Switchable LPC interface (3.3V only)
■ Internal 64K Flash ROM
   — Programmed From Direct Parallel Interface, 8051, or LPC Host
   — 2k-Byte Lockable Boot Block
   — Can be Programed Without 8051 Intervention
■ Three Power Planes
   — Low Standby Current in Sleep Mode
■ ACPI Embedded Controller Interface
■ Configuration Register Set Compatible with ISA Plugand-Play Standard (Version 1.0a)
■ High-Performance Embedded 8051 Keyboard and System Controller
   — Provides System Power Management
   — System Watch Dog Timer (WDT)
   — 8042 Style Host Interface
   — Supports Interrupt and Polling Access
   — 512 Bytes Executable RAM
   — 512 Bytes Data RAM
   — On-Chip Memory-Mapped Control Registers
   — Access to RTC and CMOS Registers
   — Up to 16x8 Keyboard Scan Matrix
   — Two-16 Bit Timer/Counters
   — Integrated Full-Duplex Serial Port Interface
   — Eleven 8051 Interrupt Sources
   — Thirty-Two 8-Bit, Host/8051 Mailbox Registers
   — Thirty-Two Maskable Hardware Wake-Up Events
   — Fast GATEA20
   — Fast CPU_RESET
   — Multiple Clock Sources and Operating Frequencies
   — IDLE and SLEEP Modes
   — Fail-Safe Ring Oscillator
■ Real-Time Clock
   — MC146818 and DS1287 Compatible
   — 256 Bytes of Battery Backed CMOS in Two 128-Byte Banks
   — 128 Bytes of CMOS RAM Lockable in 4x32-Byte Blocks
   — 12- and 24-Hour Time Format
   — Binary and BCD Format
   — <2µA Standby Current (typ)
■ Two 8584-Style I2C/SMBus Controllers
   — 8051 Controlled Logic Allows I2C/SMBus Master or Slave Operation
   — I2C/SMBus Controllers are Fully Operational on Standby Power
   — 2 Sets of Dedicated Pins per I2C/SMBus Controller
■ Serial Peripheral Interface (SPI)
■ Four independent Hardware Driven PS/2 Ports
■ 41 General Purpose I/O Pins
   — 25 Maskable Hardware Wake-Event Capable
   — 6 Programmable Open-Drain/Push-Pull Outputs
■ Four Programmable Pulse-Width Modulator Outputs
   — Independent Clock Rates
   — 6-Bit Duty Cycle Granularity
   — Operational in both Full on and Standby modes
■ Dual Fan Tachometer Inputs
■ Debug Port (UART)
   — High-Speed 16550A-Compatible UART with 16-Byte Send/Receive FIFOs
   — Programmable Baud Rate Generator
   — Relocatable to 480 Different Base I/O Addresses
   — 15 IRQ Options
■ XNOR-Chain Test Mode
■ 128-Pin QFP and VTQFP Package


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