M24512MJ Datasheet PDF - STMicroelectronics

SUMMARY DESCRIPTION
These I2C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 64K x 8 bits.
I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock line. The devices carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the I2C bus definition.
The device behaves as a slave in the I2C protocol, with all memory operations synchronized by the serial clock. Read and Write operations are initiated by a Start condition, generated by the bus master. The Start condition is followed by a Device Select Code and Read/Write bit (RW) (as described in Table 3.), terminated by an acknowledge bit.

FEATURES SUMMARY
â–  Two-Wire I2C Serial Interface
   Supports 400 kHz Protocol
â–  Supply Voltage Ranges:
   – 1.8V to 5.5V (M24512 − R)
   – 2.5V to 5.5V (M24512 − W)
â–  Write Control Input
â–  BYTE and PAGE WRITE (up to 128 Bytes)
â–  RANDOM and SEQUENTIAL READ Modes
â–  Self-Timed Programming Cycle
â–  Automatic Address Incrementing
â–  Enhanced ESD/Latch-Up Protection
â–  More than 100,000 Erase/Write Cycles
â–  More than 40-Year Data Retention