M74HC4028(1992) Datasheet PDF - STMicroelectronics

DESCRIPTION
The M54/74HC4028 is a high speed CMOS BCDTO-DECIMAL DECODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. A BCD code applied to the four inputs (A to D) provides a high level at the selected one of the decimal decoded outputs. An illegal BCD code such as eleven to fifteen gives a low level at all outputs. The device also can be used as 3-TO- 8-LINE DECODER, when D input is assigned as a disable input. The device is useful for code conversion, address decoding, memory selection, demultiplexing, or read out decoding.

■ HIGH SPEED
   tPD = 18 ns (TYP.) AT VCC = 5 V
■ LOW POWER DISSIPATION
   ICC = 4 µA (MAX.) AT TA = 25 °C
■ HIGH NOISE IMMUNITY
   VNIH = VNIL = 28 % VCC (MIN.)
■ OUTPUT DRIVE CAPABILITY
   10 LSTTL LOADS
■ SYMMETRICAL OUTPUT IMPEDANCE
   |IOH| = IOL = 4 mA (MIN.)
■ BALANCED PROPAGATION DELAYS
   tPLH = tPHL
■ WIDE OPERATING VOLTAGE RANGE
   VCC (OPR) = 2 V TO 6 V
■ PIN AND FUNCTION COMPATIBLE
   WITH 4028B