The MC10H135 is a dual J–K master–slave flip–flop. The device is provided with an asynchronous set(s) and reset(R). These set and reset inputs overide the clock.
A common clock is provided with separate J–K inputs. When the clock is static, the JK inputs do not effect the output. The output states of the flip flop change on the positive transition of the clock.

• Propagation delay, 1.5 ns Typical
• Power Dissipation, 280 mW Typical/Pkg. (No Load)
• ftog 250 MHz Max
• Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) Voltage Compensated
• MECL 10K–Compatible