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MT28F320J3 Datasheet PDF - Micron Technology

MT28F128J3 image

Part Name
MT28F320J3

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52 Pages

File Size
444.8 kB

MFG CO.
Micron
Micron Technology Micron

GENERAL DESCRIPTION
The MT28F128J3 is a nonvolatile, electrically block erasable (Flash), programmable memory containing 134,217,728 bits organized as 16,777,218 bytes (8 bits) or 8,388,608 words (16 bits). This 128Mb device is organized as one hundred twenty-eight 128KB erase blocks. The MT28F640J3 contains 67,108,864 bits organized as 8,388,608 bytes (8 bits) or 4,194,304 words (16 bits). This 64Mb device is organized as sixty-four 128KB erase blocks.
Similarly, the MT28F320J3 contains 33,554,432 bits organized as 4,194,304 bytes (8 bits) or 2,097,152 words (16 bits). This 32Mb device is organized as thirty-two 128KB erase blocks.
These three devices feature in-system block locking. They also have common flash interface (CFI) that permits software algorithms to be used for entire families of devices. The software is device-independent, JEDEC ID-independent with forward and backward compatibility.


FEATURES
• x8/x16 organization
• One hundred twenty-eight 128KB erase blocks (128Mb)
   Sixty-four 128KB erase blocks (64Mb)
   Thirty-two 128KB erase blocks (32Mb)
• VCC, VCCQ, and VPEN voltages:
   2.7V to 3.6V VCC operation
   2.7V to 3.6V or 4.5V to 5.5V* VCCQ operation
   2.7V to 3.6V, or 5V VPEN application programming
• Interface Asynchronous Page Mode Reads:
   150ns/25ns read access time (128Mb)
   120ns/25ns read access time (64Mb)
   110ns/25ns read access time (32Mb)
• Enhanced data protection feature with VPEN = VSS Flexible sector locking Sector erase/program lockout during power transition
• Security OTP block feature Permanent block locking (Contact factory for availability)
• Industry-standard pinout
• Inputs and outputs are fully TTL-compatible
• Common Flash Interface (CFI) and Scalable Command Set
• Automatic write and erase algorithm
• 4.7µs-per-byte effective programming time using write buffer
• 128-bit protection register
   64-bit unique device identifier
   64-bit user-programmable OTP cells
• 100,000 ERASE cycles per block
• Automatic suspend options:
   Block Erase Suspend-to-Read
   Block Erase Suspend-to-Program
   Program Suspend-to-Read


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