P600-27TSC Datasheet PDF - PhaseLink Corporation

DESCRIPTION
   The PLL600-27T/-37T form a low cost family of XO IC’s, designed to replace multiple XO solutions saving the cost and board space of clock distribution buffers. In addition, they provide among the lowest current on the market for the 10MHz to 52MHz range. They accept input crystals from 10 to 52MHz (fundamental resonant mode) and provide low phase noise (<-130dBc at 10kHz offset at 30MHz), and very low jitter (2.5 ps RMS period jitter) outputs.

FEATURES
• 3 CMOS outputs with OE tri-state control
• Low current consumption:
   PLL600-27T: <4.5mA @ 27MHz with standard
                        CMOS buffer (3.3V)
   PLL600-37T: <3.0mA @ 27MHz with CMOS
                        compatible Clipped buffer, offering
                        the lowest current consumption
                        (3.3V)
• 10 to 52MHz fundamental crystal input.
• Low phase noise (-130 dBc @ 10kHz offset).
• Low jitter (RMS): 2.5ps period jitter.
• 12mA drive capability at TTL output.
• 1.62V to 3.63V DC operation.
• Available in 8 pin SOIC.