P680-37QC Datasheet PDF - PhaseLink Corporation

DESCRIPTION
   The PL680-3X is a monolithic low jitter and low phase noise high performance clock, capable of maintaining 0.4ps RMS phase jitter and CMOS, LVDS or PECL outputs, covering a wide frequency output range up to 640MHz. It allows high performance and high frequency output, using a low cost fundamental crystal of between 19-40MHz.. The frequency selector pads of PL680-3X enable output frequencies of (2, 4, 8, or 16) * FXIN. The PL680-3X is designed to address the demanding requirements of high performance applications such Fiber Channel, serial ATA, Ethernet, SAN, etc.

FEATURES
• Less than 0.4ps RMS (12KHz-20MHz) phase
   jitter for all frequencies.
• Less than 25ps peak to peak jitter for all
   frequencies.
• Low phase noise output (@ 1MHz frequency
   offset
   ∗ -144dBc/Hz for 106.25MHz
   ∗ -144dBc/Hz for 156.25MHz
   ∗ -144dBc/Hz for 212.5MHz
   ∗ -140dBc/Hz for 312.5MHz,
   ∗ -131dBC/Hz for 622.08MHz
• 19MHz-40MHz crystal input.
• 38MHz-640MHz output.
• Available in PECL, LVDS, or CMOS outputs.
• Output Enable selector.
• 2.5V & 3.3V operation.
• Available in 3x3 QFN or 16-pin TSSOP
   packages.