PDM31548SA20ITY Datasheet PDF - Paradigm Technology

Description
The PDM31548 is a high-performance CMOS static RAM organized as 131,072 x 16 bits. The PDM31548 features low power dissipation using chip enable (CE) and has an output enable input (OE) for fast memory access. Byte access is supported by upper and lower byte controls.

FEATUREs
□ High-speed access times
    - Com’l: 10, 12, 15 and 20 ns
    - Ind: 12, 15 and 20 ns
□ Low power operation (typical)
    - PDM31548SA
        Active: 250 mW
        Standby: 25 mW
□ High-density 128K x 16 architecture
□ 3.3V (±0.3V) power supply
□ Fully static operation
□ TTL-compatible inputs and outputs
□ Output buffer controls: OE
□ Data byte controls: LB, UB
□ Packages:
    Plastic SOJ (400 mil) - SO
    Plastic TSOP (II) - T