PDSP16488AGC Datasheet PDF - Zarlink Semiconductor Inc

The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional convolution between the pixels within a video window and a set of stored coefficients. An internal multiplier accumulator array can be multi-cycled at double or quadruple the pixel clock rate. This then gives the window size options listed in Table 1.

FEATURES
■ The PDSP16488A is a replacement for the PDSP16488 (see Note below)
■ 8 or 16-bit Pixels with rates up to 40 MHz
■ Window Sizes up to 838 with a Single Device
■ Eight Internal Line Delays
■ Supports Interlace and Frame-to-Frame Operations
■ Coefficients Supplied from an EPROM or Remote Host
■ Expandable in both X and Y for Larger Windows
■ Gain Control and Pixel Output Manipulation
■ 84-pin PGA or 132-pin QFP Package Options