PLL103-07XC Datasheet PDF - PhaseLink Corporation

DESCRIPTIONS
The PLL103-07 is designed as a 2.5V buffer to distribute high-speed clocks in PC applications. The device has 12 outputs. These outputs can be configured to support 2 DDR DIMMs. The PLL103-07 can be used in conjunction with the PLL202-04 or similar clock synthesizer for the VIA Pro 266 chipset.

FEATURES
• Generates 12-output buffers from one input.
• Supports VIA Pro266 DDR chipset.
• Supports up to 2 DDR DIMMS.
• Supports up to 400MHz DDR, SDRAMS.
• One additional output for feedback.
• 6 differential clock distribution.
• Less than 5ns delay.
• Skew between any outputs is less than 100 ps.
• 2.5V Supply range.
• Available in 28-pin SSOP.