PLL600-27MSC Datasheet PDF - PhaseLink Corporation

DESCRIPTION
   The PLL600-27M is part of PhaseLink ’s low cost family of XO IC’s, designed to replace multiple XO solutions saving the cost and board space of clock distribution buffers. In addition, this product family provides among the lowest current on the market for the 10MHz to 52MHz range. They accept input crystals from 10MHz to 52MHz (fundamental resonant mode) and provide low phase noise (<- 130dBc at 10kHz offset at 30MHz), and very low jitter (2.5 ps RMS period jitter) outputs.

FEATURES
• Generates 4 CMOS outputs from 2 crystal inputs
   • XIN1- Accepts a 10 to 52MHz crystal input
      and generates 1 CMOS output at the same
      frequency.
   • XIN2- Accepts a 10 to 52MHz crystal input
      and generates 3 CMOS outputs at the same
      frequency.
• Low phase noise (-130 dBc @ 10kHz offset).
• Low jitter (RMS): 2.5ps period jitter.
• 12mA drive capability at TTL output.
• 1.62V to 3.63V DC operation.
• Available in 14 pin 150mil SOIC.