QL8150-8PS484C(2002) Datasheet PDF - QuickLogic Corporation

Device Highlights
Flexible Programmable Logic
• 0.18 µ, six layer metal CMOS process
• 1.8 V Vcc, 1.8/2.5/3.3 V drive capable I/O
• Up to 4,008 dedicated flip-flops
• Up to 55.3 K embedded RAM Bits
• Up to 313 I/O
• Up to 370 K system gates
• IEEE 1149.1 Boundary Scan Testing Compliant
• Low Power Capability

Embedded Dual Port SRAM
• Up to twenty-four 2,304 bit Dual Port High Performance SRAM Blocks
• Up to 55,296 embedded RAM bits
• RAM/ROM/FIFO Wizard for automatic configuration
• Configurable and cascadable

Programmable I/O
• High performance I/O cell with Tco< 3 ns
• Programmable Slew Rate Control
• Programmable I/O Standards:
   • LVTTL, LVCMOS, LVCMOS18, PCI, GTL+, SSTL2, and SSTL3
   • Independent I/O Banks capable of supporting multiple standards in one device
   • I/O Register Configurations: Input, Output, Output Enable (OE)

Advanced Clock Network
• Multiple dedicated Low Skew Clock Networks
• High drive input-only networks
• Quadrant-based segmentable clock networks
• User Programmable Phase Locked Loops

Embedded Computational Units (ECUs)
   Hardwired DSP building blocks with integrated Multiply, Add, and Accumulate Functions.

Security Features
   The QuickLogic products come with secure ViaLink® technology that protects intellectual property from design theft and reverse engineering. No external configuration memory needed; Instant-on at Power-up.