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SC28L92A1B Datasheet PDF - NXP Semiconductors.

SC28L92 image

Part Name
SC28L92A1B

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73 Pages

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284.1 kB

MFG CO.
NXP
NXP Semiconductors. NXP

General description
The SC28L92 is a pin and function replacement for the SCC2692 and SC26C92 operating at 3.3 V or 5 V supply with added features and deeper FIFOs. Its configuration on power-up is that of the SC26C92.


FEATUREs
■ Member of IMPACT family: 3.3 V to 5.0 V, −40 °C to +85 °C and 68xxx or 80xxx bus interface for all devices
■ Dual full-duplex independent asynchronous receiver/transmitters
■ 16 character FIFOs for each receiver and transmitter
■ Pin programming selects 68xxx or 80xxx bus interface
■ Programmable data format
    ◆ 5 data to 8 data bits plus parity
    ◆ Odd, even, no parity or force parity
    ◆ 1 stop, 1.5 stop or 2 stop bits programmable in 1⁄16-bit increments
■ 16-bit programmable counter/timer
■ Programmable baud rate for each receiver and transmitter selectable from:
    ◆ 28 fixed rates: 50 kBd to 230.4 kBd
    ◆ Other baud rates to 1 MHz at 16×
    ◆ Programmable user-defined rates derived from a programmable counter/timer
    ◆ External 1× or 16× clock
■ Parity, framing, and overrun error detection
■ False start bit detection
■ Line break detection and generation
■ Programmable channel mode
    ◆ Normal (full-duplex)
    ◆ Automatic echo
    ◆ Local loopback
    ◆ Remote loopback
    ◆ Multi-drop mode (also called wake-up or 9-bit)
■ Multi-function 7-bit input port (includes IACKN)
    ◆ Can serve as clock or control inputs
    ◆ Change of state detection on four inputs
    ◆ Inputs have typically > 100 kΩ pull-up resistors
    ◆ Change of state detectors for modem control
■ Multi-function 8-bit output port
    ◆ Individual bit set/reset capability
    ◆ Outputs can be programmed to be status/interrupt signals
    ◆ FIFO status for DMA interface
■ Versatile interrupt system
    ◆ Single interrupt output with eight maskable interrupting conditions
    ◆ Output port can be configured to provide a total of up to six separate interrupt outputs that may be wire ORed
    ◆ Each FIFO can be programmed for four different interrupt levels
    ◆ Watchdog timer for each receiver
■ Maximum data transfer rates: 1× - 1 Mbit/s, 16× - 1 Mbit/s
■ Automatic wake-up mode for multi-drop applications
■ Start-end break interrupt/status
■ Detects break which originates in the middle of a character
■ On-chip crystal oscillator
■ Power-down mode
■ Receiver time-out mode
■ Single 3.3 V or 5 V power supply
■ Powers up to emulate SC26C92


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