SL74LV573D Datasheet PDF - System Logic Semiconductor

OCTAL D-TYPE TRANSPARENT LATCH (3-State)

By pinning SL74LV573 are compatible with SL74HC573 and SL74HCT573 series. Input voltage levels are compatible with stadard CMOS levels.

 • Output voltage levels are compatible with input levels of CMOS, NMOS and TTL ICS
 • Voltage supply range from 1.2 to 5.5 V
 • LOW input current: 1.0 μÀ; 0.1 μÀ at Ò = 25 °Ñ
 • Output current 8 mÀ
 • Latch current: not less than150 mÀ at Ò = 125 °Ñ
 • ESD acceptable value: not less than 2000 V as per HBM and not less than 200 V as per MM