SM5838AS Datasheet PDF - Nippon Precision Circuits

OVERVIEW
The SM5838AS is a 5120 × 8-bit synchronous FIFO (first in, first out) high-speed line buffer. Internally, it employs static CMOS circuits which mean that it effectively has limitless data hold times. It can operate at speeds up to 33.3 MHz (normal-voltage specification).
   
FEATURES
■ 5120 × 8-bit structure
â–  Variable-length delay (21 to 5120 bits)
â–  33.3 MHz high-speed operation (normal-voltage
    specification)
â–  All input/outputs TTL compatible
â–  Independent read enable and output enable pins,
    allowing read address pointer increment in output
    data hold and output high-impedance states
â–  Supply voltage
    • 4.5 to 5.5 V (normal-voltage specification)
    • 3.0 to 4.5 V (low-voltage specification)
â–  24-pin SOP package
â–  Molybdenum-gate CMOS process
â–  A3-paper 1-line (16 dots/mm) compatible