V961PBC Datasheet PDF - QuickLogic Corporation

LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS

V961PBC provides the highest performance, most flexible, and most economical method to directly connect i960Jx or PPC401Gx processors to the PCI bus. V961PBC is also a suitable candidate for a variety of 32-bit multiplexed local bus applications based on Motorola, IBM, Intel embedded processors - where a minimal amount of glue logic is required. V961PBC may also be used in systems without a CPU for a generic PCI master/target interface.

• Glueless interface between Intel i960Jx, IBM PPC401Gx, processors and PCI bus
• Fully compliant with PCI 2.1 specification
• Configurable for primary master, bus master, or target operation
• Up to 1Kbyte burst access support on both local and PCI interface
• 576 bytes of programmable FIFO storage with DYNAMIC BANDWIDTH ALLOCATION™
• Two channel DMA controller
• Enhanced support for 8/16-bit local bus devices with programmable region size register
• 16 8-bit bi-directional mailbox registers with doorbell interrupts
• Dual bi-directional address space remapping
• On-the-fly byte order (endian) conversion
• Optional power on serial EEPROM initialization
• I2O ATU and messaging unit including hardware controlled circular queues
• Flexible PCI and local interrupt management
• Support for real-mode DOS "holes"
• Ability to generate both Type 0 and Type 1 configuration cycles
• 33MHz and 40MHz local bus versions available with independent PCI operation up to 33MHz
• Low cost 160-pin EIAJ PQFP package