VSC7416-01 Datasheet PDF - Microchip Technology

PRODUCT OVERVIEW
   The VSC7416-01 Carrier Ethernet switch contains four 10/100/1000 Mbps SGMII/SerDes Ethernet ports, two 10/100/ 1000/2500 Mbps SGMII/SerDes ports, and one 10/100/1000 Mbps SGMII/SerDes Node Processor Interface (NPI) Ethernet port. The NPI port can operate as a 5th triple-speed Ethernet port. The device provides a rich set of Carrier Ethernet switching features such as MPLS-TP, MEF Ethernet services, hierarchical QoS scheduling, provider bridging, protection switching, OAM, 1588 precision time protocol, and synchronous Ethernet. Advanced TCAM-based service, VLAN, and QoS processing enable delivery of differentiated services with per-service SLA guarantees. Security is assured through frame processing using a TCAM-based Microchip Content Aware Processor (VCAP). In addition, the device contains a powerful 416 MHz CPU enabling full management of the switch.

General Features
• 4× 1G Ethernet ports, which are tri-speed 10/100/1000 Mbps ports
• 2× 2.5G Ethernet ports, which are quad-speed 10/100/1000/2500 Mbps ports
• 1× 1G Node Processor Interface Ethernet port, which is a tri-speed 10/100/1000 Mbps port
• All ports support both 100-BASE-FX and 1000-BASE-X-SERDES
• Eight megabits of integrated shared packet memory
• Fully nonblocking wire-speed switching performance with weighted random early detection (WRED) for all frame sizes
• Eight QoS classes with 2616 queues that can be assigned to ports, QoS classes, and services
• 330 dual leaky bucket policers, per service, per QoS class, and per port
• 64 dual leaky bucket policers, flow-based through TCAM matching
• Hierarchical QoS scheduling with up to three levels of scheduling
• 256 scheduling elements, each with a DWRR/strict priority scheduler and a dual leaky bucket shaper. All combinations of DWRR vs. strict scheduling between QoS classes, services or ingress ports are possible.
• MPLS-TP LER (Ethernet pseudo-wires) and LSR with up to 128 unidirectional label switched paths and up to 128 bidirectional Ethernet pseudowires
• Up to 1024 TCAM-based classification entries for service, Quality of Service (QoS) and VLAN membership
• Up to 1024 host identity entries for source IP guarding
• Up to 512 TCAM-based security enforcement entries
• Up to 1024 TCAM-based egress tagging and MPLS label stack entries
• OAM Up and Down-MEP support for CCM, loss measurements, delay measurements, and loopback
• Service Activation Test frames generation and checking
• L1 Synchronous Ethernet
• VeriTime—Microchip’s patent-pending distributed timing technology that delivers the industry’s most accurate IEEE 1588v2 timing implementation for both one-step and two-step clocks
• Energy Efficient Ethernet (IEEE 802.3az) supported by the switch core
• VCore-III CPU system with integrated 416 MHz MIPS 24KEc™ CPU with MMU and DDR3 SDRAM controller
• PCIe 1.x CPU interface