VSC8228 Datasheet PDF - Vitesse Semiconductor

FEATURES:
Dual Clock and Data Recovery Architecture for Gigabit Ethernet and Fibre Channel Applications
FibreTimer™ Configurable Clock Recovery Unit (CRU): Repeater, Retimer, or Bypassed
Programmable Input Signal Equalization, Output De-emphasis, and Output Drive Levels
Analog Signal Detect and Protocol Monitor Indicators
Optional Half-rate SGMII Clock and Repeated Reference Clock Output
Built In Self Test Which can Generate and Detect an Unframed 2^7, 2^23, and 2^31 Pseudorandom Bit Stream (PRBS), a User Defined Pattern, and the Fibre Channel CRPAT, CJTPAT, and CSPAT Patterns