78P2352-IELR/F View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
'78P2352-IELR/F' PDF : 42 Pages View PDF
78P2352
Dual Channel
OC-3/ STM1-E/ E4 LIU
REGISTER DESCRIPTION (CONTINUED)
PORT-SPECIFIC REGISTERS
For PA[3:0] = 1-2 = N only. Accessing a register with port address greater than 2 constitutes an invalid command,
and the read/write operation will be ignored.
ADDRESS N-0: MODE CONTROL REGISTER
BIT
NAME
TYPE
DFLT
VALUE
DESCRIPTION
7 PDTX R/W
6 PDRX R/W
5 PMODE R/W
Transmitter Power-Down:
0
0 : Normal Operation
1 : Power-Down. CMI Transmit output is tri-stated.
Receiver Power-Down:
0
0 : Normal Operation
1 : Power-Down
Parallel Mode Interface Selection:
When PAR=0, PMODE is invalid and defaults to logic ‘1’;
When PAR=1, (Master Control Register: bit 5), PMODE selects the
X
source of the transmit parallel clock, either taken from the framer
externally or generated internally. Default value is determined by
CKMODE pin setting upon power up or reset.
0: Slave Timing. PIxCK clock input to the transmitter
1: Master Timing. PTOxCK clock output from the transmitter
4 SMOD[1] R/W
3 SMOD[0] R/W
Serial Mode Interface Selection:
When PAR=0 (Master Control Register: bit 5), SMOD[1:0] configures
the transmitter’s system interface. Default values determined by
CKMODE pin setting upon power up or reset.
SMOD[1] SMOD[0]
X
0
0 Synchronous clock and data are passed through a
FIFO. The CDR is bypassed.
1
0 Synchronous data is passed through the CDR and
then through the FIFO.
0
1 Plesiochronous data is passed through the CDR to
recover a clock. FIFO is bypassed because the
data is not synchronous with the reference clock.
1
1 Loop Timing Mode Enable: The recovered receive
clock is used as the reference for the transmit DLL
and FIFO.
X
When PAR=1 (Master Control Regsiter: bit 5), setting SMOD[1:0] = 11
will enable Loop Timing Mode. Default values are determined by
CKMODE pin setting upon power up or reset as follows:
CKMODE Low SMOD[1:0] default = 00 (no effect)
CKMODE Float SMOD[1:0] default = 11 (loop-timing enable)
CKMODE High SMOD[1:0] default = 01 (no effect)
2
MON
R/W
Receive Monitor Mode Enable:
0
0: Normal Operation
1: Adds 20dB of flat gain to the receive signal before equalization
NOTE: Monitor mode is only available in CMI mode.
1:0
--
R/W
00 Reserved
Page: 12 of 42
2006 Teridian Semiconductor Corporation
Rev. 2.4
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