9S12HA48 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'9S12HA48' PDF : 790 Pages View PDF
Table 1-8. Pin-Out Summary(1) (Sheet 8 of 8)
Package
Pin
LQ LQ
FP FP
Pin
100 64
2nd
Func.
Function
3rd
Func.
4th
Func.
5th
Func.
6th
Func.
Power
Supply
Internal Pull
Resistor
CTRL
Reset
State
Description
92 58 VDDA
VRH
—
—
—
—
—
—
—
—
93 59 PAD00 AN00 KWAD0
—
—
—
VDDA
PERAD
Disabled Port AD I/O, analog input of
ATD, key wakeup
94 60 PAD01 AN01 KWAD1
—
—
—
VDDA
PERAD
Disabled Port AD I/O, analog input of
ATD, key wakeup
95 61 PAD02 AN02 KWAD2
—
—
—
VDDA
PERAD
Disabled Port AD I/O, analog input of
ATD, key wakeup
96 62 PAD03 AN03 KWAD3
—
—
—
VDDA
PERAD
Disabled Port AD I/O, analog input of
ATD, key wakeup
97 63 PAD04 AN04 KWAD4
—
—
—
VDDA
PERAD
Disabled Port AD I/O, analog input of
ATD, key wakeup
98 64 PAD05 AN05 KWAD5
—
—
—
VDDA
PERAD
Disabled Port AD I/O, analog input of
ATD, key wakeup
99 — PAD06 AN06 KWAD6
—
—
—
VDDA
PERAD
Disabled Port AD I/O, analog input of
ATD, key wakeup
100 — PAD07 AN07 KWAD7
—
—
—
VDDA
PERAD
Disabled Port AD I/O, analog input of
ATD, key wakeup
1. Table shows a superset of pin functions. Not all functions are available on all derivatives
2. When Routing the IIC to PR/PH port, in order to overwrite the internal pull-down during reset, the external IIC pull-up resistor should be < =4.7K
3. When IRQ/XIRQ is enabled, the internal pull-down function will be disabled, the external pull-up resistor is required
4. VDDPLL is a internal 1.8V voltage supply
NOTE
For devices assembled in 64-pin package all non-bonded out pins should be configured as outputs after
reset in order to avoid current drawn from floating inputs. Refer to Table 1-8 for affected pins.
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