9S12HA64 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'9S12HA64' PDF : 790 Pages View PDF
Port Integration Module (S12HYPIMV1)
Table 2-22. RDRS Register Field Descriptions
Field
7-0
RDRS
Description
Port S reduced drive—Select reduced drive for outputs
This register configures the drive strength of output pins 7 through 0 as either full or reduced. If a pin is used as input
this bit has no effect.
1 Reduced drive selected (1/6 of the full drive strength).
0 Full drive strength enabled.
2.3.26 Port S Pull Device Enable Register (PERS)
Address 0x024C
R
W
Reset
7
PERS7
1
1 Read: Anytime.
Write: Anytime.
6
PERS6
5
PERS5
4
PERS4
3
PERS3
2
PERS2
1
1
1
1
1
Figure 2-24. Port S Pull Device Enable Register (PERS)
Access: User read/write1
1
0
PERS1
PERS0
1
1
Table 2-23. PERS Register Field Descriptions
Field
7-0
PERS
Description
Port S pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset all pull devices are enabled.
1 Pull device enabled.
0 Pull device disabled.
2.3.27 Port S Polarity Select Register (PPSS)
Address 0x024D
R
W
Reset
7
PPSS7
0
1 Read: Anytime.
Write: Anytime.
6
PPSS6
5
PPSS5
4
PPSS4
3
PPSS3
2
PPSS2
0
0
0
0
0
Figure 2-25. Port S Polarity Select Register (PPSS)
Access: User read/write1
1
0
PPSS1
PPSS0
0
0
MC9S12HY/HA-Family Reference Manual, Rev. 1.02
Freescale Semiconductor
89
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