9S12HY32 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'9S12HY32' PDF : 790 Pages View PDF
2.3.53
Port Integration Module (S12HYPIMV1)
Port AD Reduced Drive Register (RDR1AD)
Address 0x0275
7
R
RDR1AD7
W
Reset
0
1 Read: Anytime
Write: Anytime
6
5
4
3
2
RDR1AD6 RDR1AD5 RDR1AD4 RDR1AD3 RDR1AD2
0
0
0
0
0
Figure 2-51. Port AD Reduced Drive Register (RDR1AD)
Access: User read/write1
1
0
RDR1AD1 RDR1AD0
0
0
Table 2-45. RDR1AD Register Field Descriptions
Field
Description
7-0 Port AD reduced drive—Select reduced drive for output pin
RDR1AD This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (1/6 of the full drive strength)
0 Full drive strength enabled
2.3.54 PIM Reserved Register
Address 0x0276
7
6
5
4
3
2
R
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
1 Read: Always reads 0x00
Write: Unimplemented
Figure 2-52. PIM Reserved Register
Access: User read1
1
0
0
0
0
0
2.3.55 Port AD Pull Up Enable Register (PER1AD)
Address 0x0277
7
R
PER1AD7
W
Reset
0
Access: User read/write1
6
5
4
3
2
1
0
PER1AD6 PER1AD5 PER1AD4 PER1AD3 PER1AD2 PER1AD1 PER1AD0
0
0
0
0
0
0
0
Figure 2-53. Port AD Pull Up Enable Register (PER1AD)
MC9S12HY/HA-Family Reference Manual, Rev. 1.02
Freescale Semiconductor
105
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