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A3965SLB View Datasheet(PDF) - Allegro MicroSystems

Part Name
Description
MFG CO.
A3965SLB
Allegro
Allegro MicroSystems Allegro
'A3965SLB' PDF : 8 Pages View PDF
1 2 3 4 5 6 7 8
3965 DMOS Dual Full Bridge
PWM Motor Driver
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 20 V, VDD = 3.0 V, VSENSE = 0.5 V, fPWM < 50KHz (unless
noted otherwise)
Limits
Characteristics
Symbol Test Conditions
Min. Typ. Max. Units
Output Drivers
Load Supply Voltage Range
VBB
Operating, IOUT = ±500 mA
During Sleep Mode
6
20
V
0
20
V
Output Leakage Current
Output On Resistance
Body Diode Forward Voltage
Motor Supply Current
IDSS
RDSON
VF
IBB
VOUT = VBB
VOUT = 0 V
Source Driver, IOUT = -500 mA
Sink Driver, IOUT = 500 mA
Source Driver, IOUT = -500 mA; VBB=6V
Sink Driver, IOUT = 500 mA, VBB=6V
Source Diode, IF = -500 mA
Sink Diode, IF = 500mA
fPWM < 50 kHz
Charge Pump On, Outputs Disabled
<1.0
20
µA
<–1.0 -20
µA
1.2 1.35
.75
.9
1.3
1.5
.85
1.0
1
V
1
V
3.5
7
mA
1.5
3
mA
Sleep Mode
10
uA
Logic Supply Current
IDD
fPWM < 50 kHz
Outputs Off
Sleep Mode (Inputs below .5V)
4.5
mA
3.6
mA
<1
10
µA
Control Logic
Logic Supply Voltage Range
Logic Input Voltage
Logic Input Current
VDD
VIN(1)
VIN(0)
IIN(1)
IIN(0)
Operating
VIN = VDD*.7
VIN = VDD*.3
2.85
5.5
V
VDD*.7
V
VDD*.3
V
-20
<1.0
20
µA
-20
<1.0
20
µA
3
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