A3977KLP View Datasheet(PDF) - Allegro MicroSystems

Part Name

Description

MFG CO.

A3977KLP

MICROSTEPPING DMOS DRIVER WITH TRANSLATOR

Allegro MicroSystems 

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3977

MICROSTEPPING DMOS DRIVER

WITH TRANSLATOR

Terminal List

Terminal

Name

GND

SENSE1

HOME

DIR

OUT1A

NC

PFD

RC1

GND

AGND

REF

RC2

LOGIC SUPPLY

NC

OUT2A

MS2

MS1

SENSE2

GND

LOAD SUPPLY2

SR

RESET

OUT2B

NC

STEP

VREG

PGND

GND

VCP

CP1

CP2

NC

OUT1B

ENABLE

SLEEP

LOAD SUPPLY1

Terminal Description

Analog and power ground

Sense resistor for bridge 1

Logic output

Logic Input

DMOS H bridge 1 output A

No (internal) connection

Mixed decay setting

Analog Input for fixed offtime – bridge 1

Analog and power ground

Analog ground

Gm reference input

Analog input for fixed offtime – bridge 2

VDD, the logic supply voltage

No (internal) connection

DMOS H bridge 2 output A

Logic input

Logic input

Sense resistor for bridge 2

Analog and power ground

VBB2, the load supply for bridge 2

Logic input

Logic input

DMOS H bridge 2 output B

No (internal) connection

Logic input

Regulator decoupling

Power ground

Analog and power ground

Reservoir capacitor

Charge pump capacitor

Charge pump capacitor

No (internal) connection

DMOS H bridge 1 output B

Logic input

Logic input

VBB1, the load supply for bridge 1

A3977xLP

(TSSOP)

–

1

2

3

4

–

5

6

–

7*

8

9

10

–

11

12

13

14

–

15

16

17

18

–

19

20

21*

–

22

23

24

–

25

26

27

28

A3977xED

(PLCC)

44, 1, 2

3

4

5

6

7, 8

9

10

11, 12, 13

–

14

15

16

17

18

19

20

21

22, 23, 24

25

26

27

28

29, 30

31

32

–

33, 34, 35

36

37

38

39

40

41

42

43

* AGND and PGND on the TSSOP package must be connected together externally.

www.allegromicro.com

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