AAT1142 View Datasheet(PDF) - Advanced Analogic Technologies
Part Name
Description
MFG CO.
'AAT1142' PDF : 21 Pages View PDF
SwitchRegTM
PRODUCT DATASHEET
AAT1142
800mA Voltage-Scaling Step-Down Converter
I2C Data Bit Map
Figure 5 illustrates the data bit format. The 8-bit data is
always sent with the most significant bit first and is valid
when SCL is high. The ACK bit is set low by the AAT1142
slave device to acknowledge receipt of the data.
I2C Acknowledge Bit
The ACK bit is the ninth bit in the address and data byte.
The master must first release the SDA line, and then the
slave will pull the SDA line low. The AAT1142 sends a low
bit to acknowledge receipt of each byte. This occurs dur-
ing the ninth clock cycle of Address and Data transfers
(see Figures 5 and 6).
I2C Software Protocol
An I2C master / slave data transfer, detailing the address
and data bits, is shown in Figure 6. The programming
sequence is as follows:
1. Send a start condition
2. Send the I2C slave address with the R/W bit set low
3. Wait for acknowledge within the clock cycle
4. Send the data bits
5. Wait for acknowledge within the clock cycle
6. Send the stop condition
I2C Output Voltage Programming
The AAT1142 output voltage is programmed through the
I2C interface according to Table 1. The data register
encoded on the SCL and SDA lines determines the out-
put voltage set-point after initial start-up. Upon power-
up and prior to I2C programming, the default output
voltage is set to 1.8V.
SCL
1
2
3
4
5
6
7
8
9
MSB
LSB
SDA
D7
D6
D5
D4
D3
D2
D1
D0
ACK
Data
Figure 5: I2C Data Bit Map;
8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
SCL
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
Start
0
Slave Address
0
1
0
1
0
7-bit address (0x14)
R/W ACK
0
0
0/1
Data
0/1 0/1 0/1 0/1 0/1 0/1
ACK Stop
0/1 0/1 0/1
Figure 6: I2C SCL, SDA Transfer Protocol Example;
7-bit Slave Address (A6-A0 = 0x14), 1-bit Read/Write (R/W = 0), 1-bit Acknowledge (ACK),
8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
14
www.analogictech.com
1142.2009.08.1.1
Share Link: 
