AC206-DS02-R View Datasheet(PDF) - Broadcom Corporation
Part Name
Description
MFG CO.
'AC206-DS02-R' PDF : 70 Pages View PDF
AC206
Preliminary Data Sheet
07/08/02
Table 6: Reverse Media Independent Interface Pins
Pin Name
RvMII_TXD3 (MII_RXD3)
RvMII_TXD2 (MII_RXD2)
RvMII_TXD1 (MII_RXD1)
RvMII_TXD0 (MII_RXD0)
RvMII_TXCLK
(MII_TXCLK)
Pin #
38
37
36
35
33
RvMII_TXEN (MII_RXDV) 28
RvMII_RXD3 (MII_TXD3) 44
RvMII_RXD2 (MII_TXD2) 43
RvMII_RXD1 (MII_TXD1) 42
RvMII_RXD0 (MII_TXD0) 41
RvMII_RXCLK
31
(MII_RXCLK)
RvMII_RXDV (MII_TXEN) 40
RvMII_CRS (MII_CRS)
29
RvMII_RXER (MII_RXER) 34
RvMII_COL (MII_COL)
30
Type
O
Description
MII Transmit Data. The MAC sources RvMII_TXD[3:0]
synchronous with RvMII_TXCLK when RvMII_TXEN is asserted.
I,D,S
O
I,D
MII Transmit Clock. Continuous (25 MHz/2.5 MHz) clock output
used by MAC to synchronize RvMII_TXEN, RvMII_TXD[3:0], and
RvMII_TXER.
MII Transmit Enable. Indicates MAC has presented valid data on
the RvMII_TXD[3:0].
MII Receive Data. The PHY sources RvMII_RXD[3:0]
synchronous with RvMII_RXCLK when RvMII_RXDV is asserted.
I,D,S
I,D
I,D
I,D
I,D
MII Transmit Clock. Continuous (25 MHz/2.5 MHz) clock output
used by MAC to synchronize RvMII_RXDV, RvMII_RXD[3:0], and
RvMII_RXER.
MII Receive Data-Valid. PHY has presented valid recovered on
the RvMII_RXD[3:0].
RvMII Carrier Sense. Active when carrier has been sensed.
RvMII Receive Error. Indicates PHY has received invalid symbol
data.
RvMII Collision Detection. Active when collision is detected.
Table 7: Seven-Wire (Serial Network Interface) Pins
Pin Name
SNI_TXD (MII_TXD0)
Pin #
41
SNI_TXCLK (MII_TXCLK) 33
SNI_TXEN (MII_TXEN)
40
SNI_RXD (MII_RXD0)
35
SNI_RXCLK (MII_RXCLK) 31
SNI_CRS (MII_CRS)
29
SNI_COL (MII_COL)
30
Type
I,D
O
I,D
O
O
O
O
Description
Serial Transmit Data. The MAC sources SNI_TXD synchronous
with SNI_TXCLK when SNI_TXEN is asserted.
Serial Transmit Clock. Continuous (10 MHz) clock output used
by MAC to synchronize SNI_TXEN and SNI_TXD.
Serial Transmit Enable. Indicates MAC has presented valid data
on the SNI_TXD.
Serial Receive Data. The PHY sources SNI_RXD synchronous
with SNI_RXCLK when SNI_CRS is asserted.
Serial Receive Clock. Continuous (10 MHz) clock output used by
MAC to synchronize SNI_CRS and SNI_RXD.
Serial Carrier Sense. Active when carrier has been sensed.
Serial Collision Detection. Active when collision is detected.
Page 14 Pin Descriptions
Broadcom
Document AC206-DS05-405-R
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