ACS760ELF-20B 12 V High-Side Hot-Swap Hall Effect Based Current Monitor
OPERATING CHARACTERISTICS valid at VCC = 12 V, TA = 0°C to 85°C, unless otherwise noted
Characteristic
Symbol
Test Conditions
GENERAL ELECTRICAL CHARACTERISTICS
Linear Sensing Range
IP Current flows from IP+ to IP- pins
Primary Conductor Resistance
RPRIMARY TA = 25°C
Supply Voltage
VCC Voltage applied to IP+ pins
Supply Current
ICC
Undervoltage Lockout (UVLO)
VUVLOH VCC rising and CG pin current source turns on, EN pin = high
VUVLOL VCC falling and CG pin current source turns off, EN pin = high
UVLO Delay to Chip Enable/ Disable
tUVLOE Enabling, measured from rising VCC > VUVLOH to VGATE > 1 V
tUVLOD Disabling, from falling VCC < VUVLOL to VGATE < 1 V
FB+ to FB– Input Resistance
RFB TA = 25°C
CURRENT SENSE PERFORMANCE CHARACTERISTICS
VIOUT Analog Output Propagation
Time
tPROP
TA = 25°C, IP = 0 →20 A, capacitance from VIOUT to GND
= 100 pF
VIOUT Analog Output 10-90% Rise
Time
tr
TA = 25°C, IP = 0 →20 A, capacitance from VIOUT to GND
= 100 pF
VIOUT Analog Signal Bandwidth1
f3dB
–3 dB, Ip = 10 A peak-to-peak, TA = 25°C, no external device
filter, capacitance from VIOUT to GND = 100 pF
VIOUT Analog Signal Sensitivity
Sens
TA = 25°C
Over full ambient operating temperature range
TA = 25°C
Over full ambient operating temperature range
VIOUT Analog Noise Level
VIOUT Analog Nonlinearity
VNOISE(PP) Mean peak-to-peak, TA = 25°C, 50 kHz external device filter
ELIN
Over full ambient operating temperature range and linear
sensing range
Zero Current Output Voltage
VIOUT(Q)
TA = 0 to 55°C
TA = 0 to 85°C
Output Voltage Saturation Limits2
VOL TA = 25°C
VOH TA = 25°C
VIOUT Total Error % of IP
ETOT
TA = 25°C, IP = 20 A
TA = 0 to 85°C, IP = 20 A
VIOUT DC Output Resistance
RVIOUT IVIOUT = 1 mA
CURRENT FAULT PERFORMANCE CHARACTERISTICS
Load Power Fault Threshold
240 V*A Fault Signal Delay
PF(th)
tPFH
TA = 25°C, measured from FAULT signal to VGATE < 1 V,
2.2 μF capacitance from OPDLY pin to GND, load step from
17 A to 23 A in 100 ns
tPFL
TA = 25°C, measured from FAULT signal to VGATE < 1 V,
OPDLY pin open, load step from 17 A to 23 A in 100 ns
240 V*A Fault Signal Delay Drift
∆tPF
Over full operating ambient temperature range, external
capacitor with ±5% tolerance
Internal –3 dB Filter Frequency for FB+
and FB– Pins
fFBFILT TA = 25°C
IP Fault Switchpoint Tolerance3
IPF Fault Signal Delay4
EPF
tIPFLmax
tIPFH
Percentage error of IPF
Measured from FAULT signal to VGATE < 1 V, OCDLY pin
open, load step from 17 A to 45 A in 100 ns
Measured from FAULT signal to VGATE < 1 V, 2.2 nF capaci-
tance from OCDLY pin to GND, load step from 17 A to 45 A
in 100 ns
Min.
0
–
–
–
–
7.1
–
–
–
–
–
–
–
63
–
5.275
–
–
0.38
0.37
–
–
–
–
–
222
–
–
–15
–
–15
–
–
Typ.
–
1.5
12
10
–
–
500
–
240
2
5
50
65
–
5.416
–
20
±0.5
–
0.4
0.25
3.6
±1.0
–
1
230
425
10
–
50
–
8
425
Max.
55
–
13.2
12
10.5
–
900
2
–
–
–
–
–
67
–
5.558
–
±2.0
0.42
0.43
–
–
–
±3.5
–
238
–
12
15
–
15
12
–
Units
A
mΩ
V
mA
V
V
μs
μs
kΩ
μs
μs
kHz
mV/A
mV/A
mV/G
mV/G
mV
%
V
V
V
V
%
%
Ω
W
ms
μs
%
kHz
%
μs
μs
Continued on the next page…
Allegro MicroSystems, Inc.
5
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com