ACS8509 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8509' PDF : 68 Pages View PDF
ACS8509 SETS
ADVANCED COMMUNICATIONS
FINAL
Table 10 Output Reference Source Selection Table
DATASHEET
Port
Name
Output Port
Technology
Frequencies Supported
O1
O2
O3
O4
FrSync
PECL/LVDS 19.44 MHz (default), 51.84 MHz, 77.76 MHz, 155.52 MHz
(PECL default)
TTL/CMOS
1.544 MHz/2.048 MHz, 3.088 MHz/4.096 MHz, 6.176 MHz/8.192 MHz, 6.48 MHz (default), 12.352
MHz/16.384 MHz, 19.44 MHz, 25.92 MHz
TTL/CMOS
19.44 MHz - fixed
TTL/CMOS
1.544 MHz/2.048 MHz
TTL/CMOS
FrSync, 8 kHz - with a 50:50 MSR
MFrSync TTL/CMOS
MFrSync, 2 kHz - with a 50:50 MSR
Note...1.544 MHz/2.048 MHz are shown for SONET/SDH respectively. Pin SONSDHB controls default, when High SONET is default.
Table 11 Multiple E1/DS1 Outputs in Relation to Standard Outputs
Mode Freq to APLL APLL clk_ filt clk_
APLL Multiplier Freq
filt/2
clk_ clk_ filt/6 clk_
filt/4
filt/8
clk_
filt/12
clk_
filt/16
clk_
filt/48
DPLL
Freq
Default 77.76 4
311.04 311.04 155.52 77.76 51.84
38.88 25.92
19.44 6.48
77.76
n value
16
8
4
n x E1 32.768 4
131.072 131.072 65.536 32.768 21.84533 16.384 10.92267 8.192 2.730667 77.76
n x T1 24.704 4
98.816 98.816 49.408 24.704 16.46933 12.352 8.234667 6.176 2.058667 77.76
O2
Frequencies Available by Output
O3
O1
O1
increases latency, wander may often only need to be
removed at specific points within a network where buffer
stores are acceptable, such as at digital cross connects.
Otherwise, wander is sometimes not required to be
attenuated and can be passed through transparently. The
ACS8509 has programmable wander transfer
characteristics in a range from 0.1 Hz to 20 Hz. The
wander and jitter transfer characteristic is shown in
Figure 5.
Wander on the local oscillator clock will not have
significant effect on the output clock whilst in Locked
mode, so long as the DPLL bandwidth is set high enough
so that the DPLL can compensate quickly enough for any
frequency changes in the crystal. In Free-run or Holdover
mode wander on the crystal is more significant. Variation
in crystal temperature or supply voltage both cause drifts
in operating frequency, as does ageing. These effects
must be limited by careful selection of a suitable
component for the local oscillator, as specified in the
Section “Local Oscillator Clock” on page 8.
Phase Variation
There will be a phase shift across the ACS8509 between
the selected input reference source and the output clock.
This phase shift may vary over time but will be constrained
to lie within specified limits. The phase shift is
characterized using two parameters, MTIE (Maximum
Time Interval Error), and TDEV (Time Deviation), which,
although being specified in all relevant specifications,
differ in acceptable limits in each one. Typical
measurements for the ACS8509 are shown in Figures 6
and 7, for Locked mode operation. Figure 8 shows a
typical measurement of Phase Error accumulation in
Holdover mode operation.
Revision 2.00/January 2006 © Semtech Corp.
Page 14
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