ADVANCED COMMUNICATIONS
ACS8510 Rev2.1 SETS
FINAL
DC Characteristics: AMI Input/Output Port ........................................................................................................................................... 54
Microprocessor Interface Timing .......................................................................................................................................................... 63
Motorola Mode .............................................................................................................................................................................................. 63
Intel Mode ....................................................................................................................................................................................................... 65
Multiplexed Mode ......................................................................................................................................................................................... 67
Serial Mode .................................................................................................................................................................................................... 69
EPROM Mode ................................................................................................................................................................................................. 71
Package Information .............................................................................................................................................................................. 72
Thermal Conditions ....................................................................................................................................................................................... 73
Application Information .......................................................................................................................................................................... 74
Revision History ...................................................................................................................................................................................... 75
Ordering Information .............................................................................................................................................................................. 76
Disclaimers ..................................................................................................................................................................................................... 76
List of Figures
Figure 1. Simple Block Diagram ............................................................................................................................................................. 1
Figure 2. ACS8510 Pin Diagram ............................................................................................................................................................ 5
Figure 3. Minimum Input Jitter Tolerance (OC-3/STM-1) ................................................................................................................... 15
Figure 4. Minimum Input Jitter Tolerance (DS1/E1) .......................................................................................................................... 16
Figure 5. Wander and Jitter Measured Transfer Characteristics ....................................................................................................... 18
Figure 6. Maximum Time Interval Error of TOUT0 output port ........................................................................................................... 20
Figure 7. Time Deviation of TOUT0 output port ................................................................................................................................... 20
Figure 8. Phase error accumulation of TOUT0 output port in Holdover mode .................................................................................. 20
Figure 9. Inactivity and Irregularity Monitoring ................................................................................................................................... 38
Figure 10. Master-Slave Schematic ..................................................................................................................................................... 46
Figure 11. Automatic Mode Control State Diagram ........................................................................................................................... 47
Figure 12. Recommended Line Termination for PECL Input/Output Ports ...................................................................................... 51
Figure 13. Recommended Line Termination for LVDS Input/Output Ports ...................................................................................... 53
Figure 14. Signal Structure of 64 kHz/8kHz Central Clock Interface ............................................................................................ 55
Figure 15. AMI Input and Output Signal Levels .................................................................................................................................. 55
Figure 16. Recommended Line Termination for AMI Output/Output Ports ..................................................................................... 56
Figure 17. JTAG Timing ............................................................................................................................................................................ 61
Figure 18. Input/Output Timing ............................................................................................................................................................ 62
Figure 19. Read Access Timing in MOTOROLA Mode ........................................................................................................................ 63
Figure 20. Write Access Timing in MOTOROLA Mode ....................................................................................................................... 64
Figure 21. Read Access Timing in INTEL Mode ................................................................................................................................... 65
Figure 22. Write Access Timing in INTEL Mode .................................................................................................................................. 66
Figure 23. Read Access Timing in MULTIPLEXED Mode .................................................................................................................... 67
Figure 24. Write Access Timing in MULTIPLEXED Mode ................................................................................................................... 68
Figure 25. Read Access Timing in SERIAL Mode ................................................................................................................................ 69
Figure 26. Write Access Timing in SERIAL Mode ............................................................................................................................... 70
Figure 27. Access Timing in EPROM Mode ......................................................................................................................................... 71
Figure 28. LQFP Package ...................................................................................................................................................................... 72
Figure 29. Typical 100 Pin LQFP Footprint ......................................................................................................................................... 73
Figure 30. Simplified Application Schematic ...................................................................................................................................... 74
Revision 2.00/September 2003 Semtech Corp.
3
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