ACS8515 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8515' PDF : 50 Pages View PDF
ACS8515 Rev2.1 LC/P
ADVANCED COMMUNICATIONS
Figure 5. Wander and Jitter Transfer Measured Characteristics
5
FINAL
0
-3
-5
-10
-15
-20
-25
-30 0.01
0.1 Hz
0.3 Hz
0.5 Hz
1.0 Hz
2.0 Hz
4.0 Hz
8.0 Hz
17 Hz
0.1
1
10
100
Frequency (Hz)
1000
any buffer store potentially increases latency,
wander may often only need to be removed at
specific points within a network where buffer
stores are acceptable, such as at digital cross
connects. Otherwise, wander is sometimes not
required to be attenuated and can be passed
through transparently. The ACS8515 has
programmable wander transfer characteristics
in a range from 0.1 Hz to 20 Hz. The wander
and jitter transfer characteristic is shown in
Figure 5.
Wander on the local oscillator clock will not
have significant effect on the output clock whilst
in locked mode, so long as the DPLL bandwidth
is set high enough so that the DPLL can
compensate quickly enough for any frequency
changes in the crystal. In Free-run or Holdover
mode wander on the crystal is more significant.
Variation in crystal temperature or supply
voltage both cause drifts in operating frequency,
as does ageing. These effects must be limited
by careful selection of a suitable component
for the local oscillator, as specified in the section
‘Local Oscillator Clock’.
Phase Variation
There will be a phase shift across the ACS8515
between the selected input reference source
and the output clock. This phase shift may vary
over time but will be constrained to lie within
specified limits. The phase shift is characterized
using two parameters, MTIE (Maximum Time
Interval Error), and TDEV (Time Deviation), which,
although being specified in all relevent
specifications, differ in acceptable limits in each
one. Typical measurements for the ACS8515
are shown in Figures 6 and 7, for locked mode
operation. Figure 8 shows a typical
measurement of Phase Error accumulation in
Holdover mode operation.
The required performance for phase variation
during Holdover is specified in several ways
depending upon the particular circumstances
pertaining:
1. ETSI 300 462-5, Section 9.1, requires that the short-
term phase error during switchover (i.e., Locked to Holdover
to Locked) be limited to an accumulation rate no greater
than 0.05 ppm during a 15 second interval.
Revision 2.01/December 2005 Semtech Corp.
14
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