ADVANCED COMMUNICATIONS
FINAL
Table 39 DC Characteristics: LVDS Input/Output Port
Across all operating conditions, unless otherwise stated
Parameter
Symbol
Minimum
LVDS Input Voltage Range
VVRLVDS
0
Differential Input Voltage = 100 mV
LVDS Differential Input Threshold
LVDS Input Differential Voltage
LVDS Input Termination Resistance
Must be placed externally across the LVDS
± input pins of ACS8520. Resistor should
be 100 Ω with 5% tolerance
VDITH
VIDLVTSDS
RTERM
-100
0.1
95
LVDS Output High Voltage
(Note (i))
VOHLVDS
-
LVDS Output Low Voltage
(Note (i))
VOLLVDS
0.885
LVDS Differential Output Voltage
VODLVDS
250
LVDS Change in Magnitude of Differential
VDOSLVDS
-
Output Voltage for complementary States
(Note (i))
LVDS Output Offset Voltage
Temperature = 25oC (Note (i))
VOSLVDS
Note: (i) With 100 Ω load between the differential outputs.
1.125
Typical
-
-
-
100
-
-
-
-
-
ACS8520 SETS
DATASHEET
Maximum
2.40
+100
1.4
105
Units
V
mV
V
Ω
1.585
V
-
V
450
mV
25
mV
1.275
V
Figure 24 Recommended Line Termination for LVDS Input/Output Ports
n x 8 kHz,
1.544/2.048 MHz,
6.48 MHz,
19.44 MHz,
38.88 MHz,
51.84 MHz,
77.76 MHz or
155.52 MHz
ZO = 50Ω
100 Ω
ZO = 50Ω
I5POS TO6POS
I5NEG TO6NEG
ZO = 50Ω
100 Ω
ZO = 50Ω
Fully
Programmable
Output Frequencies
n x 8 kHz,
1.544/2.048 MHz,
6.48 MHz,
19.44 MHz,
38.88 MHz,
51.84 MHz,
77.76 MHz or
155.52 MHz
ZO = 50Ω
100 Ω
ZO = 50Ω
I6POS TO7POS
I6NEG TO7NEG
ZO = 50Ω
100 Ω
ZO = 50Ω
Fully
Programmable
Output Frequencies
ZO = Transmission line Impedance
VDD = +3.3 V
n = integer 1 to 12,500
F8530D_025LVDS_06
Revision 3.02/October 2005 © Semtech Corp.
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