ACS8520 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8520' PDF : 150 Pages View PDF
ACS8520 SETS
ADVANCED COMMUNICATIONS
FINAL
DATASHEET
factors, with more choice given as the bandwidth setting Table 6 ITU and ETSI Specification
increases into the frequency regions classified as jitter.
Table 5 shows which damping factors are available for
Parameter
Value
selection at the different bandwidth settings, and what
the corresponding jitter transfer approximate gain peak
will be.
Table 5 Available Damping Factors for different DPLL
Bandwidths, and associated Jitter Peak Values
Tolerance
±4.6 ppm over 20 year lifetime
Drift
(Frequency Drift
over supply
voltage range of
+2.7 V to +3.3 V)
±0.05 ppm/15 seconds @ constant temp.
±0.01 ppm/day @ constant temp.
±1 ppm over temp. range 0 to +70°C
Bandwidth
0.1 Hz to 4 Hz
8 Hz
18 Hz
35 Hz
70 Hz
Reg. 6B [2:0] Damping Gain Peak/ dB
Factor selected
1, 2, 3, 4, 5 5
0.1
1
2.5
0.2
2, 3, 4, 5
5
0.1
1
1.2
0.4
2
2.5
0.2
3, 4, 5
5
0.1
1
1.2
0.4
2
2.5
0.2
3
5
0.1
4, 5
10
0.06
1
1.2
0.4
2
2.5
0.2
3
5
0.1
4
10
0.06
5
20
0.03
Local Oscillator Clock
The Master system clock on the ACS8520 should be
provided by an external clock oscillator of frequency
12.800 MHz. The clock specification is important for
meeting the ITU/ETSI and Telcordia performance
requirements for Holdover mode. ITU and ETSI
specifications permit a combined drift characteristic, at
constant temperature, of all non-temperature-related
parameters, of up to 10 ppb per day. The same
specifications allow a drift of 1 ppm over a temperature
range of 0 to +70°C.
Telcordia specifications are somewhat tighter, requiring a
non-temperature-related drift of less than 40 ppb per day
and a drift of 280 ppb over the temperature range 0 to
+50°C. Please contact Semtech for information on crystal
oscillator suppliers
Table 7 Telcordia GR-1244 CORE Specification
Parameter
Value
Tolerance
±4.6 ppm over 20 year lifetime
Drift
(Frequency Drift
over supply
voltage range of
+2.7 V to +3.3 V)
±0.05 ppm/15 seconds @ constant temp.
±0.04 ppm/15 seconds @ constant temp.
±0.28 ppm/over temp. range 0 to +50°C
Crystal Frequency Calibration
The absolute crystal frequency accuracy is less important
than the stability since any frequency offset can be
compensated by adjustment of register values in the IC.
This allows for calibration and compensation of any
crystal frequency variation away from its nominal value.
±50 ppm adjustment would be sufficient to cope with
most crystals, in fact the range is an order of magnitude
larger due to the use of two 8-bit register locations. The
setting of the conf_nominal_frequency register allows for
this adjustment. An increase in the register value
increases the output frequencies by 0.0196229 ppm for
each LSB step.
The default register value (in decimal) = 39321
(9999 hex) = 0 ppm offset. The minimum to maximum
offset range of the register is 0 to 65535 dec, giving an
adjustment range of -771 ppm to +514 ppm of the output
frequencies, in 0.0196229 ppm steps.
Example: If the crystal was oscillating at 12.800 MHz +
5 ppm, then the calibration value in the register to give a
- 5 ppm adjustment in output frequencies to compensate
for the crystal inaccuracy, would be:
39321 - (5/0.0196229) = 39066 (dec) = 989A (hex).
Revision 3.02/October 2005 © Semtech Corp.
Page 22
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