ACS8522A View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8522A' PDF : 118 Pages View PDF
ACS8522A SETS LITE
ADVANCED COMMS & SENSING
Address (hex): 05
FINAL
DATASHEET
Register Name sts_interrupts
Description
(R/W) Bits [7:0] of the interrupt Default Value 1111 1111
status register.
Bit 7
SEC3 valid
change
Bit 6
Bit 5
Bit 4
Bit 3
SEC2 valid
change
Bit 2
SEC1 valid
change
Bit 1
Bit 0
Bit No.
Description
Bit Value Value Description
7
SEC3 valid change
0
Input SEC3 has not changed status (valid/invalid).
Interrupt indicating that input SEC3 has become
1
Input SEC3 has changed status (valid/invalid).
valid (if it was invalid), or invalid (if it was valid).
Writing 1 resets the input to 0.
Latched until reset by software writing a 1 to this bit.
[6:4]
Not used.
-
-
3
SEC2 valid change
0
Input SEC2 has not changed status (valid/invalid).
Interrupt indicating that input SEC2 has become
1
Input SEC2 has changed status (valid/invalid).
valid (if it was invalid), or invalid (if it was valid).
Writing 1 resets the input to 0.
Latched until reset by software writing a 1 to this bit.
2
SEC1 valid change
0
Input SEC1 has not changed status (valid/invalid).
Interrupt indicating that input SEC1 has become
1
Input SEC1 has changed status (valid/invalid).
valid (if it was invalid), or invalid (if it was valid).
Writing 1 resets the input to 0.
Latched until reset by software writing a 1 to this bit.
[1:0]
Not used.
-
-
Address (hex): 06
Register Name sts_interrupts
Description
(R/W) bits [15:8] of the interrupt Default Value 0111 1111
status register.
Bit 7
operating_
mode
Bit 6
main_ref_failed
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SEC4 valid
change
Bit No.
Description
Bit Value Value Description
7
operating_mode
Interrupt indicating that the operating mode has
changed. Latched until reset by software writing a 1
to this bit.
6
main_ref_failed
Interrupt indicating that input to the T0 DPLL has
failed. This interrupt will be raised after 2 missing
input cycles. This is much quicker than waiting for
the input to become invalid. This input is not
generated in Free-run or Holdover modes. Latched
until reset by software writing a 1 to this bit.
0
Operating mode has not changed.
1
Operating mode has changed.
Writing 1 resets the input to 0.
0
Input to the T0 DPLL is valid.
1
Input to the T0 DPLL has failed.
Writing 1 resets the input to 0.
Revision 1.00/September 2007 © Semtech Corp.
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