ADVANCED COMMUNICATIONS
Application Information
Figure 8 Simplified Application Schematic
FINAL
ACS8527 MUXPLL
DATASHEET
P1
5v
0v
term_connect
VDD5v
(+)
C2
100uF
IC2
3
1
VIN
GND
VOUT 2
VDD
EZ1086-3.3V
(
+)
C3
100nF
C4
10uF_TANT
C5
100nF
ZD1
BZV90C-5.6v
DGND
VDD3
VDD2
VDDA
AGND
DGND2
DGND3
An example setup where input and
output clocks are hard wired to
accept 19.44MHz on SEC1 and SEC2.
T4e1out-ut21/re1con.75ured as:
O1 -> 155.52MHz
O2 -> 38.88MHz
VDD
C-MAC
E2747_ 12.8MHz
O2
DGND
C15
100nF
VDDA
AGND
9 VS
10 GNDb
OP 5
GND 4
DGND
X1
DGND
Typical 12.8MHz oscillator
source failure indication
AGND
R1
C6
10R 100nF
VDDA
R2
10R
VDD3
C7
100nF
DGND3
C8
100nF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AGND1
IC1
AGND2
VA1+
LOS_ALARM
REFCLK
DGND1
VD1+
VD2+
DGND2
DGND3
VD3+
SRCSW
VA2+
AGND3
IC2
source switch control
AGND
DGND
C14
VDD
100nF
IC1
ACS8527
PORB
PORB 48
IC9 47
O1_FREQ1 46
O1_FREQ0 45
NC1 44
IC8 43
IC7 42
TMS 41
DGND5 40
VDD2 39
O2_FREQ1 38
TRST 37
O2_FREQ2 36
O2_FREQ0 35
IP_FREQ2 34
IP_FREQ1 33
C13
1nF
DGND VDD
C12
VDD
DGND
100nF
VDD5v
VDD
VDD
VDD
R5
R3 BSH205
10K
1M
M1
PORB
R4
C16
220nF
1K
DGND
Optional circuit to ensure SRCSW is
high on power-up
C10
100nF
DGND
optional -
only needed
for 5v
protection
C11
100nF
DGND
VDD2
FrSync
MFrSync O1P O1N
DGND2
C9
100nF
SEC1
DGND2
SEC2
DGND
F8527D_031SimpleApp_01
Revision 4.01/June 2006 © Semtech Corp.
Page 18
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