ADSP-21061 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-21061' PDF : 47 Pages View PDF
ADSP-21061L SPECIFICATIONS
OPERATING CONDITIONS (3.3 V)
ADSP-21061/ADSP-21061L
A Grade
K Grade
Parameter Description
Min
Nom Max
Min
Nom
Max
Unit
VDD
Supply Voltage
3.15
3.3
3.45
3.15
3.3
3.45
V
TCASE
VIH11
VIH22
VIL 1, 2
Case Operating Temperature
–40
High Level Input Voltage @ VDD = Max 2.0
High Level Input Voltage @ VDD = Max 2.2
Low Level Input Voltage @ VDD = Min –0.5
+85
0
VDD + 0.5 2.0
VDD + 0.5 2.2
+0.8
–0.5
+85
C
VDD + 0.5
V
VDD + 0.5
V
+0.8
V
1 Applies to input and bidirectional pins: DATA47–0, ADDR31–0, RD, WR, SW, ACK, SBTS, IRQ2–0, FLAG3–0, HGB, CS, DMAR1, DMAR2, BR6–1, ID2–0, RPBA, CPA, TFS0,
TFS1, RFS0, RFS1, EBOOT, BMS, TMS, TDI, TCK, HBR, DR0, DR1, TCLK0, TCLK1, RCLK0, RCLK1
2 Applies to input pins: CLKIN, RESET, TRST
ELECTRICAL CHARACTERISTICS (3.3 V)
Parameter
Description
Test Conditions
Min Max Unit
VOH1,2
VOL1, 2
IIH3, 4
IIL3
IILP4
IOZH5, 6, 7, 8
IOZL5
IOZHP
IOZLC7
IOZLA9
IOZLAR8
IOZLS6
CIN10, 11
High Level Output Voltage
Low Level Output Voltage
High Level Input Current
Low Level Input Current
Low Level Input Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Input Capacitance
@ VDD = Min, IOH = –2.0 mA
@ VDD = Min, IOL = 4.0 mA
@ VDD = Max, VIN = VDD Max
@ VDD = Max, VIN = 0 V
@ VDD = Max, VIN = 0 V
@ VDD = Max, VIN = VDD Max
@ VDD = Max, VIN = 0 V
@ VDD = Max, VIN = VDD Max
@ VDD = Max, VIN = 0 V
@ VDD = Max, VIN = 1.5 V
@ VDD = Max, VIN = 0 V
@ VDD = Max, VIN = 0 V
fIN = 1 MHz, TCASE = 25°C, VIN = 2.5 V
2.4
V
0.4
V
10
μA
10
μA
150
μA
10
μA
10
μA
350
μA
1.5
mA
350
μA
4.2
mA
150
μA
4.7
pF
1 Applies to output and bidirectional pins: DATA47–0, ADDR31–0, 3-0, MS3–0, RD, WR, PAGE, ADRCLK, SW, ACK, FLAG3-0, TIMEXP, HBG, REDY, DMAG1, DMAG2,
BR6–1, CPA, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, BMS, TDO, EMU, ICSA.
2 See “Output Drive Currents” on Page 45 for typical drive current capabilities.
3 Applies to input pins: ACK, SBTS, IRQ2–0, HBR, CS, DMAR1, DMAR2, ID2–0, RPBA, EBOOT, LBOOT, CLKIN, RESET, TCK.
4 Applies to input pins with internal pull-ups: DR0, DR1, TRST, TMS, TDI, EMU.
5 Applies to three-statable pins: DATA47–0, ADDR31–0, MS3–0, RD, WR, PAGE, ADRCLK, SW, ACK, FLAG3–0, HBG, REDY, DMAG1, DMAG2, BMS, BR6–1, TFSx, RFSx,
TDO, EMU. (Note that ACK is pulled up internally with 2 k during reset in a multiprocessor system, when ID2–0 = 001 and another ADSP-21061 is not requesting bus
mastership.)
6 Applies to three-statable pins with internal pull-ups: DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1.
7 Applies to CPA pin.
8 Applies to ACK pin when pulled up. (Note that ACK is pulled up internally with 2 k during reset in a multiprocessor system, when ID2–0 = 001 and another ADSP-21061L
is not requesting bus mastership).
9 Applies to ACK pin when keeper latch enabled.
10Applies to all signal pins.
11Guaranteed but not tested.
Rev. D | Page 17 of 52 | May 2013
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